The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing are needed. For example, the need to perform higher resolution lithography processes grows. One lithography technique is extreme ultraviolet lithography (EUVL). Other techniques include X-Ray lithography, ion beam projection lithography, electron beam projection lithography, and multiple electron beam maskless lithography.
The EUVL employs scanners using light in the extreme ultraviolet (EUV) region. EUV scanners provide the desired pattern on an absorption layer (“EUV” mask absorber) formed on a reflective mask. Currently, binary intensity masks (BIM) are employed in EUVL for fabricating integrated circuits. For EUV light, all materials are highly absorbing. Thus, reflective optics rather than refractive optics is used. A reflective mask is used. However, the reflectance of EUV mask is very low. The EUV energy is substantially lost on the optical path. The EUV energy reaching the wafer is much less. There are other issues including low throughput issue, especially for a via layer due to the low transmittance through the via.
Therefore, what is needed is the method for a lithography process and the mask structure utilized in the method to address the above issues.